Clavier: An FPGA-based mechanical keyboard with USB hub and comms interfaces

Clavier (French for ‘keyboard’) is an FPGA-based mechanical keyboard with an integrated USB hub, and numerous communication interfaces (JTAG, SPI, I²C, UART).

• Full size 105 keys ISO keyboard + one extra
• Compatible with PCB mounted Cherry MX switches
• N-key rollover
• 1000 Hz polling rate
• No multiplexing, no ghosting
• 2-port USB 2.0 hub
• JTAG, SPI, I²C, 2 × UART, and 8 × GPIOs
• FPGA-based, VHDL only, no ALU
• Fully open-source, including all design tools (see below)

It's the coffee key. Use it to lock your computer and go have a break.

It can also be long-pressed for 5 seconds to reset the FPGA.

• KiCad for the PCB
• FreeCAD or OpenSCAD for the housing
• OSS CAD Suite (GHDL, Yosys, hdl, ghdl-yosys-plugin, nextpnr-ecp5, ecppack, and openFPGALoader) and GNU Make for the FPGA

The PCB has 4 layers and requires no unusual capabilities to produce. It is however not easy to assemble by hand mostly due to 0402 passives and the FPGA in BGA packaging.

A PDF version of the schematics is available here, for convenience: PCB/doc/clavier.pdf.

An OpenSCAD version of the housing was created first and is fine for 3D printing. The FreeCAD version was created afterwards for exporting to STEP, which is more suitable for CNC machining. Both alternatives are functionally equivalent.

The first version fits properly, but it turns out that it is not angled in a comfortable way. To correct this, a second version was created with an angle of 8° that makes the front part much thinner. This one is only available in FreeCAD.

Simply run make in the FPGA subfolder. If using OSS CAD Suite, make sure the environment is set first.

The integrated JTAG interface can be used to program the FPGA. The switch SW18 is used to toggle the interfaces on or off. The LED D1 close by displays the current status. Connect the JTAG interface with jumper cables, then run either make prog-sram or make prog-flash, depending on if the configuration needs to be permanent or not.

Except for the GPIOs that are connected directly to the FPGA, communications are handled by the CH347F.

• The PCB and housing are licensed under the CERN Open Hardware Licence Version 2 - Permissive.
• The FPGA code is licensed under the MIT Licence.
• The pictures are licensed under the CC BY 4.0 License.