Intel "Nova Lake" Could Arrive Without AVX10, APX, and AMX Support

Intel is still finalizing its next-generation "Nova Lake" specifications. However, the core microarchitecture has been done, the NPU design is finished and upgraded, and the instruction set is finalized. It could be the case that these consumer CPUs will again lack support for Intel's AVX10, APX, and AMX instruction set—designed to encompass 512-bit acceleration and fast vector/matrix multiplication for tasks like content creation, encoding/decoding, AI, and much more—remaining exclusive to Intel Xeon processors. According to the latest GCC compiler patch, the initial Nova Lake enablement patch does not include AVX10, AMX, or APX. This might suggest that support for these new x86 instructions could be missing from the next-generation CPU. Initially, Intel decided to disable AVX-512 for "Alder Lake" and "Raptor Lake" client-oriented CPU lineups, meaning that only server-grade Xeon CPUs got the accelerated 512-bit data paths.

This GCC patch seems to contradict the findings from August, when Intel introduced AVX10.2 support for "future Intel Core processors" in the oneDNN software library, likely targeting the Nova Lake series. We need to wait for more information from other enablement patches or direct confirmation from Intel regarding whether AVX10, APX, and AMX will be included in the 52-core Nova Lake SKUs. Enabling fast vector and matrix acceleration on 52 cores would be ideal for consumers, content creators, gamers, and workstation users alike. In comparison, AMD introduced full AVX-512 support with its "Zen 5" cores across its product range, providing a performance boost in optimized applications for both desktop and server CPUs. This marked the first time AMD did not emulate 512-bit AVX, which previously required splitting 512-bit data into two 256-bit units to be processed over two cycles.

The latest patch states the following instructions are now supported:

Intel Nova Lake CPU with 64-bit extensions, MOVBE, MMX, SSE, SSE2, SSE3, SSSE3, SSE4.1, SSE4.2, POPCNT, AES, PREFETCHW, PCLMUL, RDRND, XSAVE, XSAVEC, XSAVES, XSAVEOPT, FSGSBASE, PTWRITE, RDPID, SGX, GFNI-SSE, CLWB, MOVDIRI, MOVDIR64B, WAITPKG, ADCX, AVX, AVX2, BMI, BMI2, F16C, FMA, LZCNT, PCONFIG, PKU, VAES, VPCLMULQDQ, SERIALIZE, HRESET, AVX-VNNI, UINTR, AVXIFMA, AVXVNNIINT8, AVXNECONVERT, CMPCCXADD, AVXVNNIINT16, SHA512, SM3, SM4 and PREFETCHI instruction set support.