Overview of new technologies applied to BiCS FLASH generation 8

Next, we will explain OPS. The memory cell to access is uniquely selected, with the combination of voltage applied to word-line, bit-line, and select-gate in BiCS FLASH™. The select-gate is shared among the four lines of memory strings, and each select-gate is electrically separated by an insulator. When we look at the configuration of the select-gate and the memory strings in the in-plane direction, the insulator separating the select-gate (the insulator slit) overlaps with the dummy memory strings which do not function as memory cells in the past technology node. On the other hand, in OPS, the insulator slit is placed between the electrically active memory strings, and the dummy memory strings are eliminated to increase the memory density (Figure 3).

By adopting newly developed CBA and OPS technologies, we successfully enhanced performance and the memory density up to the level mentioned above in BiCS FLASH™ generation 8.