Show HN: River – simple RV32IM assembler ~600 loc

# river :: RIscV assemblER RV32IM Instruction Set (https://www.cs.sfu.ca/~ashriram/Courses/CS295/assets/notebooks/RISCV/RISCV_CARD.pdf) *Note: Set RIVER_DEBUG=True for debug printing ## How * Lex input into tokens * 3 pass pre-processing (1) Fill symbol table (2) Resolve symbol addresses given constant worst case pseudo expansion lengths (3) Expand pseudo instructions into token arrays * Final parse + machine code generation pass ## Features [x] RV32I Base Integer Instructions [x] Labels [x] Register ABI Names [x] RV32M Extension [x] Basic Pseudo-Instructions: j, li, la, mv, nop, neg, call, ret, beqz, bnez, bgez, bltz [x] Error handling, source line # + error messages ## Todo [] Better immediate parsing (negative hex, binary) [] Test script + files [] More Pseduo-instructions [] Assembler directives [] Dissasembler / Emulator?? ## Examples Error messages: ``` > python3 assembler.py perp_test.s perp_test.s:5 :: 'Error calculating symbol offset: piffle' | call piffle perp_test.s:6 :: 'Error parsing immediate: bar' | li a7 , bar perp_test.s:12 :: 'Error matching arguments, should be 6 not 5 | Template args: sub rd, rs1, rs2' | sub t0 , t1 , perp_test.s:16 :: 'Error parsing register: foo' | div a0 , t0 , foo ```