Show HN:Interactive RISC-V CPU Visualizer (Sequential and Pipelined)

addi x1, x0, 15 # Initialize x1 = 15 addi x2, x0, 25 # Initialize x2 = 25 addi x3, x0, 7 # Initialize x3 = 7 addi x4, x0, 18 # Initialize x4 = 18 add x5, x1, x2 # Add: x5 = x1 + x2 sub x6, x2, x1 # Subtract: x6 = x2 - x1 and x7, x1, x3 # Bitwise AND: x7 = x1 & x3 or x8, x1, x3 # Bitwise OR: x8 = x1 | x3 sd x5, 0(x0) # Store x5 to memory[0] sd x6, 8(x0) # Store x6 to memory[8] ld x9, 0(x0) # Load from memory[0] to x9 ld x10, 8(x0) # Load from memory[8] to x10 add x11, x9, x10 # x11 = x9 + x10 sub x12, x9, x10 # x12 = x9 - x10 beq x11, x12, skip # Branch if x11 == x12 addi x13, x0, 100 # x13 = 100 or x14, x11, x12 # x14 = x11 | x12 and x15, x11, x12 # x15 = x11 & x12 sd x14, 16(x0) # Store x14 to memory[16] sd x15, 24(x0) # Store x15 to memory[24] skip: addi x16, x0, 50 # x16 = 50 add x17, x16, x15 # x17 = x16 + x15 sub x18, x17, x14 # x18 = x17 - x14 beq x17, x18, end # Branch if x17 == x18 ld x19, 16(x0) # Load from memory[16] to x19 ld x20, 24(x0) # Load from memory[24] to x20 or x21, x19, x20 # x21 = x19 | x20 and x22, x19, x20 # x22 = x19 & x20 sd x21, 32(x0) # Store x21 to memory[32] sd x22, 40(x0) # Store x22 to memory[40] end: nop